Titan: Difference between revisions

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{{Infobox Chip
{{Infobox Chip
| name        = Titan
| name        = Titan
| image        = Titan-II.jpg
| image        = Titan.jpg
| image_size  = 350px
| image_size  = 350px
| caption      = Titan II
| caption      = Titan
| image2      = Titan-II.jpg
| caption2    = Titan II
| designedby  = IBM
| designedby  = IBM
}}
}}


The '''Titan''' is a development board used during bringup of the [[Shiva]] and [[Waternoose]] Engineering Sample CPUs. It also allows an IBM RISCWatch to be used to debug and test the processors.
'''Titan''' is a development board used during bringup of the [[Shiva]] and [[Waternoose]] Engineering Sample CPUs. It also allows an IBM RISCWatch to be used to debug and test the processors.


== Specifications ==
== Specifications ==
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There are two versions, the Titan and the Titan II.
There are two versions, the Titan and the Titan II.


The Titan is powered off the console via the 3.3V [[Power Rails#V_MEMPORT|V_MEMPORT]] and 1.8V [[Power Rails#V_1P8|V_1P8]] rails. The 3.3V is also stepped down to 2.5V and 1.2V.
The Titan is powered off the console via the 3.3V [[Power Rails (Original)#V_MPORT|V_MPORT]]. This is stepped down to 2.5V and 1.2V. Titan used on [[Shiva]] receives 1.3V from [[Power Rails (Original)#V_CPUCORE|V_CPUCORE]]. Titan used on [[Waternoose]] receives 1.8V from [[Power Rails (Original)#V_1P8|V_1P8]].


The 10-pin J_YETI header connects to J8C1, the CPU JTAG header, while the 12-pin J_GPUL header connects to J7G2, the [[Shiva]] GPUL JTAG header.
The 10-pin J_YETI header connects to J8C1, the CPU JTAG header, while the 12-pin J_GPUL header connects to J7G2, the [[Shiva]] GPUL JTAG header.


Different bitstreams are required for [[Shiva]], and the various revisions of [[Waternoose]], due to difference in [[Power On Reset]].
Different bitstreams are required for Shiva, and the various revisions of Waternoose, due to difference in [[Power On Reset]].


The DIP switch operation is not currently known. The recommended configuration is OFF - OFF - ON - OFF.
The some of the DIP switches are specific to the firmware version. The recommended configuration for DD1 is OFF - OFF - ON - OFF.


=== LEDs ===
=== LEDs ===
The Titan II has 9 LEDs mounted near one end. Reverse engineering has been used to determine their meaning. Earlier Titan revisions do not have LEDs, as the GPIOs that control them are connected to the J_GPUL header for connecting to [[Shiva]].
The Titan II has 9 LEDs mounted near one end. Reverse engineering has been used to determine their meaning. Earlier Titan revisions do not have LEDs, as the GPIOs that control them are connected to the J_GPUL header for [[Shiva]]. As a result, Titan II boards cannot use Shiva firmware.
 
* LED 0 through LED 4 are blue LEDs that indicate the status code between 0x00 and 0x1F. Bit 0 (LED 0) is MSB.


For DD1 Firmware:
For DD1 Firmware:
* LED 0 through LED 4 are blue LEDs that indicate the status code between 0x00 and 0x1F. Bit 0 (LED 0) is the most significant bit.
* LED 5 is a red LED that indicates when the Titan times out when attempting to boot the CPU.
* LED 5 is a red LED that indicates when the Titan times out when attempting to boot the CPU.
* LED 6 is a green LED that indicates booting priority is [[Secure ROM]].
* LED 6 is a green LED that indicates booting priority is [[Secure ROM]].
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== Gallery ==
== Gallery ==
<gallery widths=500px heights=261px>
<gallery widths=500px heights=261px>
File:XeDK-007-1.jpg|XeDK 007 with Titan II powered on
File:XeDK-007-1.jpg|Xenon 007 with Titan II powered on
</gallery>
</gallery>


[[Category:Console Components]]
[[Category:Console Components]]
{{Console Components}}
{{Console Components}}

Latest revision as of 03:02, 16 December 2023

Titan
Titan.jpg
Titan
Titan-II.jpg
Titan II
Designed ByIBM

Titan is a development board used during bringup of the Shiva and Waternoose Engineering Sample CPUs. It also allows an IBM RISCWatch to be used to debug and test the processors.

Specifications

  • Xilinx Spartan 3 XC3S200 FPGA
  • 128KB Xilinx XCF01S JTAG PROM
  • 4 DIP Switches
  • 9 3.3V LEDs (Titan II only)
  • 50MHz 3.3V Crystal

Details

There are two versions, the Titan and the Titan II.

The Titan is powered off the console via the 3.3V V_MPORT. This is stepped down to 2.5V and 1.2V. Titan used on Shiva receives 1.3V from V_CPUCORE. Titan used on Waternoose receives 1.8V from V_1P8.

The 10-pin J_YETI header connects to J8C1, the CPU JTAG header, while the 12-pin J_GPUL header connects to J7G2, the Shiva GPUL JTAG header.

Different bitstreams are required for Shiva, and the various revisions of Waternoose, due to difference in Power On Reset.

The some of the DIP switches are specific to the firmware version. The recommended configuration for DD1 is OFF - OFF - ON - OFF.

LEDs

The Titan II has 9 LEDs mounted near one end. Reverse engineering has been used to determine their meaning. Earlier Titan revisions do not have LEDs, as the GPIOs that control them are connected to the J_GPUL header for Shiva. As a result, Titan II boards cannot use Shiva firmware.

For DD1 Firmware:

  • LED 0 through LED 4 are blue LEDs that indicate the status code between 0x00 and 0x1F. Bit 0 (LED 0) is the most significant bit.
  • LED 5 is a red LED that indicates when the Titan times out when attempting to boot the CPU.
  • LED 6 is a green LED that indicates booting priority is Secure ROM.
  • LED 7 is a yellow LED that indicates booting priority is Sysver.
  • LED 8 is a red LED that indicates that the cores will be held for RISCWatch use.

Gallery