Vejle

{{Infobox Chip | name = Valhalla
Vejle | image = X818337-004.jpg | image_size = 150px | caption = Valhalla | image2 = X818337-004-delid.jpg | image2_size = 150px | caption2 = Valhalla with IHS removed | partnumber = X818337 | introduced = Mid 2010 | designedby = ATi
IBM
Microsoft
NEC (eDRAM) | type = XCGPU | usedin = Trinity
Corona
Waitsburg
Stingray | clockspeed = 3.2GHz (CPU)
500MHz (GPU) | cache = L1: 32KB/32KB (CPU)
L2: 1MB (CPU) | memory = 10MB eDRAM (GPU) | arch = PowerPC RISC (CPU) | cores = 3 (CPU) | threads = 6 (CPU) | process = 45nm (CGPU die)
65nm (eDRAM die) | package = Flip-chip BGA1155 | predecessor = Loki
Kronos | successor = [[Oban] }}

Valhalla (also known as Vejle) is the first XCGPU and is used on the Trinity, Corona, Waitsburg, and Stingray motherboards. It is the successor to Loki CPU and Kronos GPU, and is manufactured on the 45nm process (except for the eDRAM daughter-die, which remains at 65nm). Valhalla adds an Integrated Heat Spreader over the dies.

Specifications

CPU

• 3 two-way SMD-capable RISC cores clocked at 3.2GHz
• SIMD: Two VMX128 units
• 32KB L1 data cache
• 32KB L1 instruction cache
• 1MB L2 cache at 1.6 GHz with a 256-bit bus
• 21.6GB/s FSB
• 768 bits of IBM eFUSE One-Time-Program memory for fusesets
• One-Time-Programmable ROM and 64KB SRAM for the 1BL and Config Ring
• Big-endian architecture
• A02 stepping
• 45nm process

GPU

• 500Mhz clock speed
• 48 floating-point vector processors divided into 3 dynamically scheduled SIMD groups (16 each)
• Unified shader architecture
• 16 texture addressing units
• 16 texture filtering units
• 8 pixel rendering pipelines
• Direct access to CPU L2 cache
• A02 stepping
• 45nm process

eDRAM

• 10MB 256GB/s eDRAM
• Contains logic for:
  • 4-sample anti-aliasing
  • Alpha compositing
  • Color
  • Z/stencil buffering
• GS21 stepping
• 65nm process

Details

Valhalla uses the Styx eDRAM.

• Part Number: X818337