XCPU: Difference between revisions
No edit summary |
|||
Line 46: | Line 46: | ||
In 2007, the XCPU was shrunk and slightly redesigned for the 65nm process. Known as [[Loki]], it is used on the [[Falcon]] and [[Jasper]] motherboards. It is notable for having significantly lower power and thermal requirements. | In 2007, the XCPU was shrunk and slightly redesigned for the 65nm process. Known as [[Loki]], it is used on the [[Falcon]] and [[Jasper]] motherboards. It is notable for having significantly lower power and thermal requirements. | ||
=== XCGPU | === XCGPU === | ||
{{Main|XCGPU}} | {{Main|XCGPU}} | ||
In 2010, the XCPU | In 2010, the XCPU combined with the [[Xenos]] graphics chip to create a system-on-a-chip, called the [[XCGPU]]. | ||
{{Motherboard Components}} | {{Motherboard Components}} | ||
[[Category:Motherboard Components]] | [[Category:Motherboard Components]] |
Revision as of 14:14, 4 April 2024
Introduced | Late 2005 |
---|---|
Designed By | IBM Microsoft |
Codename | Xenon |
Type | CPU |
Used In | Original Xbox 360 |
Clock Speed | 3.2GHz |
Cache | L1: 32KB/32KB L2: 1MB |
Instruction Set | PowerPC RISC |
Cores | 3 |
Threads | 6 |
Predecessor | Shiva |
Successor | XCGPU |
The Microsoft XCPU, codename Xenon, is the central processor used in the Xbox 360. It is designed to be used with the ATi Xenos graphics chip, which also functions as the northbridge and memory controller.
The processor was developed by Microsoft and IBM, and the first version was codenamed Waternoose after the fictional character Henry J. Waternoose III.
Waternoose is the first "real" CPU for the Xbox 360, replacing the earlier Shiva CPU, which was only used for early development.
Specifications
- 3 two-way SMD-capable RISC cores clocked at 3.2GHz
- SIMD: Two VMX128 units
- 32KB L1 data cache
- 32KB L1 instruction cache
- 1MB L2 cache at 1.6 GHz with a 256-bit bus
- 21.6GB/s FSB
- 768 bits of IBM eFUSE One-Time-Program memory for fusesets
- One-Time-Programmable ROM and 64KB SRAM for the 1BL and Config Ring
- Big-endian architecture
Secure ROM
All version of the XCPU contain a One-Time-Programmable (OTP) Secure ROM using eFUSEs. This ensures that it can never be modified after being written. The Secure ROM contains the 1BL, config ring, and configuration fuses.
SRAM
The cache in the XCPU is used as SRAM for the 1BL and 2BL bootloaders, as system RAM is not yet available.
Variants
Waternoose (90nm)
The initial versions of the XCPU, known as Waternoose, entered production in 2005 and are used on the Xenon and Zephyr motherboards. It is notable for being quite power hungry.
Loki (65nm)
In 2007, the XCPU was shrunk and slightly redesigned for the 65nm process. Known as Loki, it is used on the Falcon and Jasper motherboards. It is notable for having significantly lower power and thermal requirements.
XCGPU
In 2010, the XCPU combined with the Xenos graphics chip to create a system-on-a-chip, called the XCGPU.