Loki: Difference between revisions
Jump to navigation
Jump to search
No edit summary |
(→A01) |
||
| (6 intermediate revisions by the same user not shown) | |||
| Line 17: | Line 17: | ||
| package = Flip-chip BGA783 | | package = Flip-chip BGA783 | ||
| predecessor = [[Waternoose]] | | predecessor = [[Waternoose]] | ||
| successor = [[ | | successor = [[Vejle]] | ||
}} | }} | ||
| Line 24: | Line 24: | ||
== Specifications == | == Specifications == | ||
{{CPU Specs}} | {{CPU Specs}} | ||
* A01 [[stepping]] | |||
* 65nm process | * 65nm process | ||
* 41W TDP | * 41W TDP | ||
| Line 29: | Line 30: | ||
== Details == | == Details == | ||
* Part Number: X812480 | * Part Number: X812480 | ||
== Prototypes == | |||
Engineering Samples by [[stepping]]. | |||
=== A00 === | |||
First version. | |||
* Part Number: Unknown | |||
=== A01 === | |||
Minor update. Engineering sample for the final production chip. | |||
* Part Numbers: | |||
** X809682-006 | |||
** X890682-006 | |||
[[File:X809682-006.jpg|150px]] | |||
[[File:X890682-006.jpg|150px]] | |||
{{Motherboard Components}} | {{Motherboard Components}} | ||
[[Category:Motherboard Components]] | [[Category:Motherboard Components]] | ||
Latest revision as of 12:14, 20 December 2024
 | |
| Part Number | X812480 |
|---|---|
| Introduced | Late 2007 |
| Designed By | IBM Microsoft |
| Type | XCPU |
| Used In | Falcon Jasper Tonasket |
| Clock Speed | 3.2GHz |
| Cache | L1: 32KB/32KB L2: 1MB |
| Instruction Set | PowerPC RISC |
| Cores | 3 |
| Threads | 6 |
| Process | 65nm |
| TDP | 41W |
| Package | Flip-chip BGA783 |
| Predecessor | Waternoose |
| Successor | Vejle |
Loki is the 65nm version of the XCPU and is used on Falcon, Jasper, and Tonasket motherboards. It is the successor to Waternoose and has a drastically reduced 41W TDP. As such, the power regulation and thermal solution requirements are significantly reduced.
Specifications
- 3 two-way SMD-capable RISC cores clocked at 3.2GHz
- SIMD: Two VMX128 units
- 32KB L1 data cache
- 32KB L1 instruction cache
- 1MB L2 cache at 1.6 GHz with a 256-bit bus
- 21.6GB/s FSB
- 768 bits of IBM eFUSE One-Time-Program memory for fusesets
- One-Time-Programmable ROM and 64KB SRAM for the 1BL and Config Ring
- Big-endian architecture
- A01 stepping
- 65nm process
- 41W TDP
Details
- Part Number: X812480
Prototypes
Engineering Samples by stepping.
A00
First version.
- Part Number: Unknown
A01
Minor update. Engineering sample for the final production chip.
- Part Numbers:
- X809682-006
- X890682-006
