Waternoose: Difference between revisions
m (Text replacement - " stepping" to " stepping") |
No edit summary |
||
| (One intermediate revision by the same user not shown) | |||
| Line 52: | Line 52: | ||
==== DD2.1 ==== | ==== DD2.1 ==== | ||
DD2.1 is a minor revision of DD2 with B01 [[stepping]], that | [[File:X02046-005.jpg|thumb|150px|upright|right|DD2.1]] | ||
DD2.1 is a minor revision of DD2 with B01 [[stepping]], that improved yield and binned chips for 75W and 85W. This allowed most motherboards to have 75W CPUs. | |||
* Part Number: X02046 (-004 and up) | * Part Number: X02046 (-004 and up) | ||
=== DD3 === | === DD3 === | ||
DD3 is a revision of DD2 that fixes minor design | DD3 is a revision of DD2 that fixes minor design issues. With the new part number, the [[stepping]] reset to A00. All chips are 75W. It also adds little-endian support which was unused due to all software features requiring full compatibility with the earlier DD2 chip. | ||
* Part Number: X806416 | * Part Number: X806416 | ||
Latest revision as of 14:33, 25 December 2023
 DD1 | |
 DD2 | |
 DD3 | |
| Part Number | X02046 X806416 |
|---|---|
| Introduced | Late 2005 |
| Designed By | IBM Microsoft |
| Type | XCPU |
| Used In | Xenon Zephyr Elpis |
| Clock Speed | 2.8-3.2GHz |
| Cache | L1: 32KB/32KB L2: 1MB |
| Instruction Set | PowerPC RISC |
| Cores | 3 |
| Threads | 6 |
| Process | 90nm |
| TDP | 75W/85W |
| Package | Flip-chip BGA899 |
| Predecessor | Shiva |
| Successor | Loki |
The Waternoose series are the original production model of the XCPU and are used on Xenon and Zephyr motherboards. They have 75-85W TDPs and are manufactured on a 90nm process.
They are named after the fictional character Henry J. Waternoose III.
Specifications
- 3 two-way SMD-capable RISC cores clocked at 3.2GHz
- SIMD: Two VMX128 units
- 32KB L1 data cache
- 32KB L1 instruction cache
- 1MB L2 cache at 1.6 GHz with a 256-bit bus
- 21.6GB/s FSB
- 768 bits of IBM eFUSE One-Time-Program memory for fusesets
- One-Time-Programmable ROM and 64KB SRAM for the 1BL and Config Ring
- Big-endian architecture
- A00 stepping (DD1, DD3)
- B00 stepping (DD2)
- B01 stepping (DD2.1)
- 90nm process
- TDP: 75W/85W
Details
DD1
DD1 is the engineering sample of the XCPU with A00 stepping, labelled XCPU-ES. It runs at 2.8GHz as opposed to the final speed of 3.2GHz. Due to mistakes in the POR sequence, these CPUs can only boot with a Titan board functioning as a service processor to bring up the CPU. It still has the original Xbox logo as it was created before the Xbox 360 name was chosen.
- Part Number: X02046 (-001)
DD2
DD2 is the initial production version of the XCPU with B00 stepping, running at 3.2GHz. Very early versions with part number X02046-002 used in certain pre-final consoles were still labelled "XCPU-ES" and ran at 2.8GHz.
- Part Number: X02046 (-002 and -003)
DD2.1
DD2.1 is a minor revision of DD2 with B01 stepping, that improved yield and binned chips for 75W and 85W. This allowed most motherboards to have 75W CPUs.
- Part Number: X02046 (-004 and up)
DD3
DD3 is a revision of DD2 that fixes minor design issues. With the new part number, the stepping reset to A00. All chips are 75W. It also adds little-endian support which was unused due to all software features requiring full compatibility with the earlier DD2 chip.
- Part Number: X806416