ANA: Difference between revisions
Jump to navigation
Jump to search
(Created page with "{{Infobox Chip | name = ANA | image = X02014-007.jpg | image_size = 150px | introduced = Late 2005 | designedby = Microsoft | usedin = Xbox 360 Xenon | process = 180nm | tdp = 1.3W | package = LQFP144 | successor = PSB }} The '''ANA''' is the analog chip used in the Xenon motherboard for the Xbox 360. It contains the video encoders, DACs, clock generators (unused), t...") |
No edit summary |
||
| Line 23: | Line 23: | ||
== Details == | == Details == | ||
The clock generators in the ANA are not used due to excessive PLL jitter. This was planned to be fixed in the C00 version of ANA, however this chip was not ready in time. The [[Backup Clock Generator]] is used instead to generate system clocks. ANA still generates the video clocks. The PLL jitter issue was fixed in [[HANA]]. | The clock generators in the ANA are not used due to excessive PLL jitter. This was planned to be fixed in the C00 version of ANA, however this chip was not ready in time. The [[Backup Clock Generator]] is used instead to generate system clocks. ANA still generates the video and audio clocks. The PLL jitter issue was fixed in [[HANA]]. | ||
* Part Number: X02014 | * Part Number: X02014 | ||
Revision as of 14:33, 27 December 2022
 | |
| Introduced | Late 2005 |
|---|---|
| Designed By | Microsoft |
| Used In | Xbox 360 Xenon |
| Process | 180nm |
| TDP | 1.3W |
| Package | LQFP144 |
| Successor | PSB |
The ANA is the analog chip used in the Xenon motherboard for the Xbox 360. It contains the video encoders, DACs, clock generators (unused), thermal sensor circuits, fan driver op-amps, and some of the Power On Reset logic.
The chip was developed by Microsoft.
Specifications
- Digital video encoder with 4 DACs
- 5 thermal diode channels
- 2 fan driver op-amps
- Power on reset logic cell
- Clock synthesizer:
- 4x 100MHz differential: CPU, GPU, PCIe, SATA
- 1x 48MHz single ended: SMC, USB
- 2x 25MHz single ended: Ethernet, SATA
- 1x 24.576MHz single ended: Audio
- 2x programmable clocks: DVE video, Pixel
- 180nm process
- 1.3W TDP
Details
The clock generators in the ANA are not used due to excessive PLL jitter. This was planned to be fixed in the C00 version of ANA, however this chip was not ready in time. The Backup Clock Generator is used instead to generate system clocks. ANA still generates the video and audio clocks. The PLL jitter issue was fixed in HANA.
- Part Number: X02014
- Foundry: Taiwan Foundry