Secondary Error Codes
SMC Errors
These errors are generated by the SMC.
0001
ANA_V12P0_PWRGD is driven high by the ANA (later HANA) as long as the V_12P0 rail is within tolerance. If V_12P0 ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0001 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x01 | ERROR_V_12P0 | ANA_V12P0_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0001 |
0002
VREG_CPU_PWRGD is driven high by the V_CPUCORE controller as long as the rail is within tolerance. If V_CPUCORE ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0002 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x02 | ERROR_V_CPUCORE | VREG_CPU_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0002 |
0003
VREG_GPU_PWRGD is driven high by the V_GPUCORE controller as long as the rail is within tolerance. If V_GPUCORE ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0003 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x03 | ERROR_V_GPUCORE | VREG_GPU_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0003 |
- Xbox 360 S and Xbox 360 E
VREG_V3P3_PWRGD is driven high by the V_3P3 controller as long as the rail is within tolerance. If V_3P3 ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0003 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x03 | ERROR_V_3P3 | VREG_V3P3_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0003 |
0010
The SMC communicates with the ANA/HANA via the SMBus. If communication is lost, the SMC enters EC_FATAL and the 0010 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x04 | ERROR_NO_ANA | ANA/HANA is not responding to reads or writes | EC_FATAL | Repair Guides/0010 |
0011
The SMC monitors the CPU thermal diode as reported by the ANA/HANA. If the CPU temperature exceeds the Trip Temperature defined in the SMC Config, the SMC enters EC_THERMAL and the 0011 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x05 | ERROR_THERMAL_CPU | CPU thermal overload | EC_THERMAL | Repair Guides/Thermal Overload |
0012
The SMC monitors the GPU thermal diode as reported by the ANA/HANA. If the GPU temperature exceeds the Trip Temperature defined in the SMC Config, the SMC enters EC_THERMAL and the 0012 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x06 | ERROR_THERMAL_GPU | GPU thermal overload | EC_THERMAL | Repair Guides/Thermal Overload |
0013
The SMC monitors the eDRAM thermal diode as reported by the ANA/HANA. If the eDRAM temperature exceeds the Trip Temperature defined in the SMC Config, the SMC enters EC_THERMAL and the 0013 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x07 | ERROR_THERMAL_EDRAM | eDRAM thermal overload | EC_THERMAL | Repair Guides/Thermal Overload |
0020
After GPU power and clocking are available, the SMC starts seqUnReset which releases the GPU from reset. It then waits for the GPU to assert GPU_RST_DONE. If the GPU_RST_DONE signal is not asserted in the time allotted, EC_BOOT will be reported. The SMC will retry 4 more times. If on the final attempt, GPU_RST_DONE is still not asserted, the SMC remains in EC_BOOT and the 0020 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x08 | ERROR_GPU_RST_DONE | GPU_RST_DONE signal not asserted after seqUnReset time passed | EC_BOOT | Repair Guides/0020 |
0021
After receiving GPU_RST_DONE during seqUnReset, the SMC monitors the PCIe L0 status and waits for the link to enter the L0 state. If the link does not enter the L0 state in the time allotted, EC_BOOT will be reported. The SMC will retry 4 more times. The SMC will retry 4 more times. If on the final attempt, the link still does not enter L0 state, the SMC remains in EC_BOOT and the 0021 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x09 | ERROR_NO_PCIE | PCIe link did not enter L0 after seqUnReset time passed | EC_BOOT | Repair Guides/0021 |
0022
After the PCIe link has entered the L0 state during seqUnReset, the SMC releases the CPU from reset. The CPU will run the Bootloaders and start the XSS. When the XSS starts, it will attempt to retrieve the power up cause from the SMC. If the SMC does not receive GetPowerUpCause in the time allotted, EC_BOOT will be reported. The SMC will retry 4 more times. If on the final attempt, GetPowerUpCause is still not received, the SMC remains in EC_BOOT and the 0022 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0A | ERROR_NO_HANDSHAKE | CPU did not send GetPowerUpCause to SMC | EC_BOOT | Repair Guides/0022 |
0023
The SMC communicates with the Backup Clock Generator via the SMBus. If communication is lost, the SMC enters EC_FATAL and the 0023 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0B | ERROR_NO_CLOCKCHIP | Clock chip is not responding to reads or writes | EC_FATAL | Repair Guides/0023 |
- Xbox 360 S and Xbox 360 E
VREG_VEDRAM_PWRGD is driven high by the V_CPUEDRAM controller as long as the rail is within tolerance. If V_CPUEDRAM ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0023 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0B | ERROR_V_CPUEDRAM | VREG_VEDRAM_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0023 |
0030
The SMC communicates with the ANA/HANA via the SMBus. If the thermal registers read as zero, the SMC enters EC_FATAL and the 0030 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0C | ERROR_NO_TEMPERATURES | CPU did not send GetPowerUpCause to SMC | EC_FATAL | Repair Guides/0030 |
0031
VREG_V5P0_VMEM_PWRGD is driven high by the V_5P0/V_MEM controller as long as the rail is within tolerance. If V_5P0 or V_MEM ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0031 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0D | ERROR_V_5P0_V_MEM | VREG_V5P0_VMEM_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0031 |
- Xbox 360 S and Xbox 360 E
VREG_V5P0_PWRGD is driven high by the V_5P0 controller as long as the rail is within tolerance. If V_5P0 ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0031 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0D | ERROR_V_5P0 | VREG_V5P0_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0031 |
0032
- Xbox 360 S and Xbox 360 E
VREG_CPUCORE_VCS_PWRGD is driven high by the V_CPUVCS controller as long as the rail is within tolerance. If V_CPUVCS ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0032 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0E | ERROR_V_CPUVCS | VREG_CPUCORE_VCS_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0032 |
0033
- Xbox 360 S and Xbox 360 E
VREG_VMEM_PWRGD is driven high by the V_MEM controller as long as the rail is within tolerance. If V_MEM ever drops out of tolerance, the signal is de-asserted, causing the SMC to enter EC_FATAL and the 0033 code to be displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x0F | ERROR_V_MEM | VREG_VMEM_PWRGD negated unexpectedly | EC_FATAL | Repair Guides/0033 |
XSS Errors
These errors are generated by the XSS and reported to the SMC.
0100
The 2BL tries to retrieve the vendor ID from each memory chip. If any of the IDs cannot be read or mismatch, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, the IDs still cannot be read or mismatch, the SMC remains in EC_XSS and the 0100 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x10 | ERROR_NBINIT_MEM_VENDOR_ID | Memory vendor ID read failed or mismatched | EC_XSS | Repair Guides/0100 |
0101
During 2BL memory initialization, if data cannot be written for read strobe training, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, data still cannot be written, the SMC remains in EC_XSS and the 0101 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x11 | ERROR_NBINIT_MEM_READ_STROBE_DATA_WRITE | Unable to write data for read strobe training | EC_XSS | Repair Guides/0101 |
0102
During 2BL memory initialization, if read strobe delay training fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, training still fails, the SMC remains in EC_XSS and the 0102 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x12 | ERROR_NBINIT_MEM_READ_STROBE_DELAY_TRAINING | Memory read strobe delay training failed | EC_XSS | Repair Guides/0102 |
0103
During 2BL memory initialization, if write strobe delay training fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, training still fails, the SMC remains in EC_XSS and the 0103 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x13 | ERROR_NBINIT_MEM_WRITE_STROBE_DELAY_TRAINING | Memory write strobe delay training failed | EC_XSS | Repair Guides/0103 |
0110
During 2BL memory initialization, if a memory addressing line fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, a memory addressing line still fails, the SMC remains in EC_XSS and the 0110 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x14 | ERROR_MEMORY_ADDRESSING | Memory address line failed or unresponsive | EC_XSS | Repair Guides/0110 |
0111
During 2BL memory initialization, if a memory data line fails, EC_XSS will be reported. The SMC will retry 4 more times. If on the final attempt, a memory data line still fails, the SMC remains in EC_XSS and the 0111 code is displayed on the front panel.
| Hex | Name | Description | Type | Repair Guide |
|---|---|---|---|---|
| 0x15 | ERROR_MEMORY_DATA | Memory data line failed or unresponsive | EC_XSS | Repair Guides/0111 |
UEM Errors
These errors are XSS errors that display a Universal Error Message on the screen. They are generated by the XSS and reported to the SMC.
1000
Occurs if kernel communications to the DVD Drive time out. The SMC enters EC_XSS, an E 64 UEM will be displayed, and the 1000 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x40 | E 64 | ERROR_XSS_CDROM_TIMED_OUT | Kernel DVD drive communications timed out | EC_XSS | Repair Guides/1000 |
1001
Occurs if the kernel cannot configure the DVD Drive for Direct Memory Access mode. The SMC enters EC_XSS, an E 65 UEM will be displayed, and the 1001 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x41 | E 65 | ERROR_XSS_CDROM_NOT_DMA_CONFIGURED | Kernel could not configure DVD drive for DMA mode | EC_XSS | Repair Guides/1001 |
1002
Occurs if the kernel cannot create a device instance for the DVD Drive. The SMC enters EC_XSS, an E 66 UEM will be displayed, and the 1002 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x42 | E 66 | ERROR_XSS_CDROM_COULD_NOT_CREATE_DEVICE | Kernel could not create DVD drive instance | EC_XSS | Repair Guides/1002 |
1003
Occurs if kernel communications to the Hard Drive time out. The SMC enters EC_XSS, an E 67 UEM will be displayed, and the 1003 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x43 | E 67 | ERROR_XSS_HDD_TIMED_OUT | Kernel HDD communications timed out | EC_XSS | Repair Guides/1003 |
1010
Occurs if the kernel cannot configure the Hard Drive for Direct Memory Access mode. The SMC enters EC_XSS, an E 68 UEM will be displayed, and the 1010 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x44 | E 68 | ERROR_XSS_HDD_NOT_DMA_CONFIGURED | Kernel could not configure HDD for DMA mode | EC_XSS | Repair Guides/1010 |
1011
Occurs if the kernel cannot create a device instance for the Hard Drive. The SMC enters EC_XSS, an E 69 UEM will be displayed, and the 1011 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x45 | E 69 | ERROR_XSS_HDD_COULD_NOT_CREATE_DEVICE | Kernel could not create HDD instance | EC_XSS | Repair Guides/1011 |
1012
Occurs if a Hard Drive is detected, but the kernel cannot find or access it. The SMC enters EC_XSS, an E 70 UEM will be displayed, and the 1012 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x46 | E 70 | ERROR_XSS_HDD_NOT_FOUND | Kernel couldn't find the HDD | EC_XSS | Repair Guides/1012 |
1013
Occurs if XAM cannot find a Dashboard (dash.xex) to load from the Nand. The SMC enters EC_XSS, an E 71 UEM will be displayed, and the 1013 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x47 | E 71 | ERROR_XSS_XAM_NO_DASH | XAM could not find dash.xex | EC_XSS | Repair Guides/1013 |
1020
Occurs if the SMC Config on the Nand is missing or corrupt. The SMC enters EC_XSS, an E 71 UEM will be displayed, and the 1020 code is displayed on the front panel.
| Hex | UEM | Name | Description | Type | Repair Guide |
|---|---|---|---|---|---|
| 0x48 | E 72 | ERROR_SMC_FLASH_CONFIG_CORRUPT | SMC configuration area in flash is corrupt | EC_XSS | Repair Guides/1020 |